EDA tools

EDA overview

EDA (electronic design automation) tools are the software utilities used in integrated circuit and PCB (printed circuit board) design. EDA software is now an essential part of the chip designing in the industry of embedded systems. EDA is a big term combining CAD (computer aided design), CAM (computer aided manufacturing), and CAE (computer aided manufacturing) software. But EDA is traditionally referred for IC and PCB design. EDA is also known as ECAD software.

Chip designing through EDA software

EDA tools are used in SOC, FPGA, ASICS, PCBS, and IC designs. Below are the general steps performed by all EDA tools.

HDL (hardware descriptive language)

The first step of chip design through EDA tools is to define the circuit behavior or functionality in the EDA software supportive language. Most common languages include VHDL, Verilog, and SPICE. Running or simulating the HDL code results in a schematic (diagram) of the circuit depending upon the code.

Floorplanning

Next step is the placement of logic gates, hard macros, Input–output pads, and power and ground pins. This is called floor planning and also known as die-map. EDA provides the best possible die-map.

Logic Synthesis

Logic synthesizer translates the HDL into Boolean logic. It provides the netlist of logic gates to be used in the circuits.

Behavioral Synthesis

Behavioral synthesizer provides the block diagram of the final input–output circuit. This circuit is used in the simulation to check the behavior.

EDA databases and IP cores

EDA software contains databases regarding components to be used. For example information about logic gates. Moreover the EDA software also allows the use of pre-programmed or deigned elements or components in your chip. These pre-programmed elements are known as IP Cores.

Simulation

EDA tools offer three sorts of simulations. These include transistor level, gate level, block level, and hardware simulation.

CDCV Tool

Clock Domain Crossing Verification tools provide the report regarding data loss, system stability, and other such potential issues associated with the design.

Mathematical Modeling

EDA tools evaluate the circuit through mathematical methods such differential equations.

Equivalence Check

EDA tools give the report regarding the comparison of the chip between transistor level and gate level.

Power Optimizer

A power optimizer tool analyzes the circuit and if possible reduces the power requirements for various elements.

Place and Rout

The place and route tools decides physical placement of the gates and other mapped elements in the gate-netlist generated by logic synthesizer. The route tool adds the physical connections (wires) among components on the chip.

Static Timing analysis

This step involves the placement of clock in the best possible way on the chip. This step is critical in dealing with clock issues such as skew.

Design Optimization

design optimization tools are used to optimize the design to get least expensive with best possible performance product.