Application Specific Integrated Circuit (ASIC) as its name indicates is an
integrated circuit. It
is a
chip designed for a specific purpose or application. For example a chip designed to run a pager is an ASIC. There are several techniques for designing an ASIC. The most common are standard cell ASIC design, gate array ASIC design, full custom ASIC design, and structured ASIC design.
Standard Cell ASIC Design
Standard cell ASIC design is the utilization of functional blocks. In standard cell ASIC design the designers can create functional blocks with known electrical characteristics. Electrical characteristics (capacitance, inductance, propagation delay, etc.) of these functional blocks can also be represented in third party tool. Such design technique offers better electrical performance and very high gate density. NRE (non recurring engineering) cost and recurring component cost lie between gate array and full custom design.
Standard Cell ASIC design summary
First step of standard cell ASIC design is the requirement analysis. Second step is register transfer level (RTL). In this step an HDL (hardware descriptive language) code is written according to the ASIC requirements. Then a
software simulator is used to perform simulation to test ASIC performance. Next step is logic synthesis. A design compiler compiles the RTL design and converts it into lower-level constructs known as standard cells. This transformation is made according to standard cell library. It is a collection of characterized gates such as two input and, inverters, etc.
After the transformation to standard cells a software tool generates agate level netlist. Netlist defines the required electrical connections for resulting standard cells. This tool places the standard cells on ASIC according to the provided constraints. Then a routing toll uses the netlist for physical connection between standard cells. This gives the estimation of final delays, capacitances, resistances, and power consumptions. Now if design works fine under all extremes of processes, temperature, and voltage, it leads to the fabrication process. Overall a standard cell ASIC design is requirement analysis, RTL description, simulation, synthesis, extraction, and physical verification.
Cell Libraries
The manufacturers provide cell libraries. This is a part of service with no additional cost. Cell libraries termed as intellectual property by the manufacturer. A specific manufacturer defines cell libraries according to its own constraints. These constrains may be the information about delays, geometry, or power characteristics of the cells. Therefore ASIC designs differ in different design tools. However the manufacturers target their tools to develop the ASIC chips that meet the
industry specifications.
ASIC Specifications
ASIC chips are used in the wide range of applications. These include both the indsutrial and
embedded applications. Some of these are
mobile phone control circuits, timer electronics, high voltage operational amplifier, pager, interface and signaling processing electronics, sensors, and control and evaluation motion detector circuits. Analogue ASIC chips are also designed for industrial applications. However these must meet output requirements. For example high current outputs require an internal protection against an excess temperature. To cater this a current limitation circuit can be designed within ASIC chip.
